The proper deposition and patterning of electrically conductive materials as for instance electrodes and interconnects are important in circuit fabrication for electronic devices. Electrodes of electronic devices such as thin film transistors can be fabricated, for example, by vacuum deposition of a metal through a shadow mask, or by vacuum deposition of a metal and subsequent patterning with photolithography technique. However, vacuum deposition and photolithography are costly techniques. They are not suitable for use in manufacturing low-cost large-area electronics, particularly plastic electronics. Manufacturing cost can be significantly reduced if the electrodes and interconnects could be directly deposited and patterned by solution depositing. In addition, although organic electrically conductive materials such as polystyrene sulfonate-doped poly(3,4-ethylenedioxythiophene) (“PSS-PEDOT”) are solution processable, metal is preferred over organic conductive materials in certain situations due to metal's higher conductivity and the potential long-term operational stability of metal electrodes and interconnects. Therefore, there is a need, addressed by embodiments of the present invention, for new processes to form the electrically conductive layer of an electronic device.
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